American Express' moat - Global Network Services

American Express stock has been hit hard this year. It was around $90 in the beginning of the year and is down to $73 by Oct-26-2015. One of the main reason for this debacle is the declining Non-Interest revenues. It was $14.15 billions (6 months ended Jun-30-2014) and was $13.36 billion (6 months ended Jun-30-2015), main reason being the lower Travel commission and fees , which declined from $923 million to $185 million in this period. One silver lining in the company’s business is its Global Network Services business. Following is an excerpt from the company’s 10-K report that highlights this point. Reference - Company's 2014 10-K report , page#5

GNS focuses on partnering with select third-party banks and other institutions to issue Cards accepted on our global network and/or acquire merchants on our network. Although we customize our network arrangements to the particular country and each partner’s requirements, as well as to our strategic plans in that marketplace, all GNS arrangements are designed to help issuers develop products that are relevant and attractive to their customers and to support the value of American Express Card acceptance to merchants. We choose to partner with institutions that share a core set of attributes compatible with the American Express brand, such as commitment to high quality standards and strong marketing expertise, and we require adherence to our product, brand and service standards.** With over 1,300 different Card products launched on our network so far by our partners, GNS strengthens our brand visibility around the world, drives more transaction volume onto our merchant network and increases the number of merchants choosing to accept the American Express Card. GNS enables us to expand our network’s global presence generally without assuming additional Card Member credit risk or having to invest a large amount of resources, as our GNS partners already have established attractive customer bases to whom they can target American Express-branded Cards, and are responsible for managing the credit risk associated with the Cards they issue. Since 1999, Cards-in-force issued by GNS partners have grown at a compound annual growth rate of 20 percent, totaling over 44 million Cards at the end of 2014. Outside the United States, approximately 80 percent of new Cards issued in 2014 were Cards issued by GNS partners. Spending on GNS Cards has grown at a compound annual rate of 23 percent since 1999, with spending on these Cards at $161 billion in 2014, up 12 percent from a year ago.

How are P&C Insurance Loss reserves computed?

Analysis of Loss reserves plays an integral part of valuation of an Insurance business. This blog post looks at basics of the Loss reserve methods prevalent in the industry. Standard actuarial reserving methods include, but are not limited to, expected loss ratio, paid and reported loss development, and Bornhuetter-Ferguson methods. A general description of these methods is provided below. Reference Ace Insurance 2014 10-K report.

The expected loss ratio for any particular origin year is selected after consideration of a number of factors, including historical loss ratios adjusted for rate changes, premium and loss trends, industry benchmarks, the results of policy level loss modeling at the time of underwriting, and/or other more subjective considerations for the product line (e.g., terms and conditions) and external environment as noted above. The expected loss ratio for a given origin year is initially established at the start of the origin year as part of the planning process. This analysis is performed in conjunction with underwriters and management. The expected loss ratio method arrives at an ultimate loss estimate by multiplying the expected ultimate loss ratio by the corresponding premium base. This method is most commonly used as the basis for the actuarial central estimate for immature origin periods on product lines where the actual paid or reported loss experience is not yet deemed sufficiently credible to serve as the principal basis for the selection of ultimate losses. The expected loss ratio for a given origin year may be modified over time if the underlying assumptions differ from the original assumptions (for example, the assessment of prior year loss ratios, loss trend, rate changes, actual claims, or other information). Selected paid and reported development patterns provide a benchmark against which the actual emerging loss experience can be monitored. Where possible, development patterns are selected based on historical loss emergence by origin year with appropriate allowance for changes in business mix, claims handling process, and/or ceded reinsurance that are likely to lead to a discernible difference between the rate of historical and future loss emergence. For product lines where the historical data is viewed to have low statistical credibility, the selected development patterns also reflect relevant industry benchmarks and/or experience from similar product lines written elsewhere within ACE. This most commonly occurs for relatively new product lines that have limited historical data or for high severity/low frequency portfolios where historical experience exhibits considerable volatility and/or lacks credibility. The paid and reported loss development methods convert the selected loss emergence pattern to a set of multiplicative factors which are then applied to actual paid or reported losses to arrive at an estimate of ultimate losses for each period. Due to their multiplicative nature, the paid and reported loss development methods will leverage differences between actual and expected loss emergence. These methods tend to be utilized for more mature origin periods and for those portfolios where the loss emergence has been relatively consistent over time. The Bornhuetter-Ferguson method is essentially a combination of the expected loss ratio method and the loss development method, where the loss development method is given more weight as the origin year matures. This approach allows a logical transition between the expected loss ratio method which is generally utilized at earlier maturities and the loss development methods which are typically utilized at later maturities. This method is applied using reported loss data although paid data may also be used. The applicability of actuarial methods will also be impacted by the attachment point of the policy or contract with the insured or ceding company. In the case of low attachment points typical of primary insurance or working layer reinsurance, the experience tends to be more frequency driven. For these product types, standard actuarial methods are generally applicable in determining loss reserve levels given sufficient history and credible loss experience (although still subject to the same limitations and uncertainties described elsewhere in this section, for example, changing inflationary or legal environments). In the case of high attachment points typical of excess insurance or excess of loss reinsurance, the experience tends to be severity driven, as only a loss of significant size will enter the layer. For these product lines, it typically takes longer for loss experience to gain credibility, which adds uncertainty to the estimates derived from standard actuarial methods. For products such as Ace’s assumed reinsurance business, they typically supplement the standard actuarial methods with an analysis of each contract's terms, original pricing information, subsequent internal and external analyses of the ongoing contracts, market exposures and history, and qualitative input from claims managers. This approach is also used for structured or unique contracts. RESERVING CONSIDERATION FOR SHORT TAIL AND LONG TAIL INSURANCE : The time period between the date of loss occurrence and the final payment date of the ensuing claim(s) is referred to as the "claim-tail." The following is a discussion of specific reserving considerations for both short-tail and long-tail product lines. In this section, we reference the nature of recent prior period development to give a high-level understanding of how these considerations translate through the reserving process into financial decisions. SHORT TAIL BUSINESSES: Short-tail business generally describes product lines for which losses are typically known and paid shortly after the loss actually occurs. This would include, for example, most property, personal accident, aviation hull, and automobile physical damage policies that we write. There are some exceptions on certain product lines or events (e.g., major hurricanes or aviation crashes) where the event has occurred, but the final settlement amount is highly uncertain (e.g., coverage disputes or liability-related claims) and not known with certainty for a potentially lengthy period. Due to the short reporting and development pattern for these product lines, the uncertainty associated with estimate of ultimate losses for any particular accident period diminishes relatively quickly as actual loss experience emerges. The company typically assigns credibility to methods that incorporate actual loss emergence, such as the paid and reported loss development and Bornhuetter-Ferguson methods, sooner than would be the case for long-tail lines at a similar stage of development for a given origin year. The reserving process for short-tail losses arising from catastrophic events typically involves an assessment by the claims department, in conjunction with underwriters and actuaries, of our exposure and estimated losses immediately following an event and then subsequent revisions of the estimated losses as our insureds provide updated actual loss information. LONG TAIL BUSINESS : For those long-tail product lines that are less claim frequency and more claim severity oriented, such as high excess professional and casualty lines, more reliance is placed upon expert legal and claims review of the specific circumstances underlying reported cases rather than loss development patterns. Where appropriate, this is supplemented with loss development and Bornhuetter-Ferguson approaches to provide for claims that have been reported but are too immature to develop individual claims estimates and also to provide for claims that have occurred but have not been reported. The assumptions used for these lines of business are updated over time to reflect new claim and legal advice judged to be of significance.

Basics of Mortgage Backed Securities

This post covers some basic knowledge one needs to invest in a business like MORTGAGE REIT that in itself mostly invests in Mortgage Backed Securities mostly by using short term Repurhase obligations keepings its securities as collateral.

What are the differences between Fannie Mae, Freddie Mac and Ginnie Mae? Ginnie Mae and Fannie Mae began as one organization more than 70 years ago, known as the Federal National Mortgage Association (FNMA). In 1968, Congress partitioned FNMA into two entities: Fannie Mae and Ginnie Mae. Fannie Mae was charged with supporting the conventional mortgage market and Ginnie Mae was charged with supporting the market for FHA, VA, RD, and PIH loans. Freddie Mac was later created in 1970 and also supports the conventional mortgage market. The key differences between Ginnie Mae and the Government-Sponsored Enterprises (GSEs), Fannie Mae and Freddie Mac, include: 1. Only Ginnie Mae securities are explicitly backed by the full faith and credit of the U.S. Government. 2. Ginnie Mae itself does not issue securities. It just guarantees the securities issued by reputable organizations. Primarily it’s the responsibility of that organization to service those securities. If they fail then Ginnie Mae foots the bill. While the GSEs are responsible for the financial losses related to the loans in their investment portfolios and MBS, the Ginnie Mae Issuer must make principal and interest pass-through payments to investors for delinquent loans, as well as provide the funds to re-purchase loans to foreclose on a home or modify a loan. Ginnie Mae Issuers are responsible for any unreimbursed costs associated with either violating insurers' servicing guidelines or for inadequate insurance coverage. This requirement provides a strong incentive for private institutions to make better quality mortgage loans. It is important to note that Ginnie Mae does not have a financial obligation to MBS investors unless the Issuer becomes insolvent. NOTE: Ginnie Mae only guarantees top notch securities. In the year 2013 it guaranteed $460 billion of Mortgage securities. It has profitably guaranteed over $2 trillion of mortgage backed securities since 2009, providing housing opportunities to 8.8 million households. (Source – 2013 report to Congress by Ginnie Mae) GinnieMae is a mono-line business that insures only Issuer performance. There are three levels of protection that must be exhausted before the GinnieMae guaranty is at risk: homeowner equity, the insurance provided by the Federal Government agency that insured the loans, and the corporate resources of the lender that issued the security.GinnieMae is in the fourth and final loss position. What is the TBA Market? Ginnie Mae’s creation of Pass through Securities Led to establishment of TBA market. Investors in TBA Securities know that the terms and conditions of the security are consistent and the underlying mortgage loans are comprised of relatively homogeneous collateral. This process enables lenders to lock in a rate before closing , which facilitates the availability of mortgages to millions of consumers. What is Mortgage Warehouse lending? Warehouse lending is a short-term revolving line of credit provided to a mortgage banking company to fund the closing of mortgages from the closing table to sale in the secondary market. The mortgage note is used as collateral for interim financing until the mortgage is sold and delivered to the permanent investor. Mortgage bankers draw upon the line of credit to fund a mortgage at closing or to purchase a closed loan from another originator. The line of credit is paid off when the loan is sold to the end investor. Warehouse lending contributes to the financial capacity the industry provides for originating loans for first-time homebuyers; refinancing troubled borrowers into new mortgages; assisting other borrowers in securing credit for residential mortgage transactions; and originating loans for the purchase, refinance or repositioning of rental properties.

Semiconductors : Analog vs Digital

Its very common to mix-up the Analog and Digital spheres of Semiconductor industry. Following is a great piece of information from Linear Technology's (LLTC) 2014 10-k report. It explains basic difference between them from a business angle.

Semiconductor components are the electronic building blocks used in electronic systems and equipment. These components are classified as either discrete devices (such as individual transistors) or integrated circuits (in which a number of transistors and other elements are combined to form a more complicated electronic circuit). Integrated circuits ("ICs") may be divided into two general categories, digital and linear (or analog). Digital circuits, such as memory devices and microprocessors, generally process on-off electrical signals, represented by binary digits, “1” and “0.” In contrast, linear integrated circuits monitor, condition, amplify or transform continuous analog signals associated with physical properties, such as temperature, pressure, weight, light, sound or speed, and play an important role in bridging between real world phenomena and a variety of electronic systems. Linear integrated circuits also provide voltage regulation and power control to electronic systems, especially in hand-held and larger battery powered systems where battery management and high power efficiency are needed. The Company believes that several factors generally distinguish the linear integrated circuit business from the digital integrated circuit business, including: Importance of Individual Design Contribution : The Company believes that the creativity of individual design engineers is of particular importance in the linear integrated circuit industry. The design of a linear integrated circuit generally involves greater variety and less repetition of integrated circuit elements than digital design. In addition, the interaction of linear integrated circuit elements is complex, and the exact placement of these elements in the integrated circuit is critical to the circuit's precision and performance. Computer-aided engineering and design tools for linear integrated circuits are not as accurate in modeling circuits as those tools used for designing digital circuits. As a result, the contributions of a relatively small number of individual design engineers are generally of greater importance in the design of linear integrated circuits than in the design of digital circuits. Smaller Capital Requirements : Digital circuit design attempts to minimize device size and maximize speed by increasing circuit densities. The process technology necessary for increased density requires very expensive wafer fabrication equipment. In contrast, linear integrated circuit design focuses on precise matching and placement of integrated circuit elements, and linear integrated circuits often require large feature sizes to achieve precision and high voltage operation. Accordingly, the linear integrated circuit manufacturing process generally requires smaller initial capital expenditures, particularly for photomasking equipment and clean room facilities, and less frequent replacement of manufacturing equipment because the equipment has, to date, been less vulnerable to technological obsolescence. Market Diversity : Relative Pricing Stability. Because of the varied applications for linear integrated circuits, manufacturers typically offer a greater variety of device types to a more diverse group of customers, who typically have smaller volume requirements per device, than is true for digital IC manufacturers. As a result, linear integrated circuit manufacturers are often less dependent upon particular products or customers; linear integrated circuit markets are generally more fragmented; and competition within those markets tends to be more diffused. LINEAR TECHNOLOGY’S (LLTC)FIGURES : In the year 2014 the company generated $1.38 billion revenues , gross margin of $1.04 billion, pre Tax income of $601 million and net income of $460 million. Total Book value as of June-30-2014 was $1.33 billions , giving Return on Equity of 34%. Cash flow from operations was $596 million with capital expenditures of just $37 million.

Semiconductor chip manufacturing business

Manufacturing semiconductor chips is a highly complex process and equipment needed for it is still more complex. Applied Materials’ Silicon Systems group segment is a leader in this niche industry. It generated around $5.97 billion in revenues in 2014 through this business which had $1.39 billion operating income. The net capital expenditure was just $134 million and total assets were $5.5 billion. The ratio of Operating income to total assets was ($1.39 / $5.97) = 23%. This is sign of a business with great Economics because of the large moat it possesses . Following is an excerpt from the company’s latest 10-K report that provides details of the Semiconductor equipment manufacturing business. As of Dec-12 2014 the company had over 33,000 semiconductor chip manufacturing systems all over the world. The revenue generated from servicing these machines in 2014 was $2.2 billion with operating income of $573 million.

Most chips are built on a silicon wafer base and include a variety of circuit components, such as transistors and other devices, that are connected by multiple layers of wiring (interconnects). Applied offers systems that perform various processes used in chip fabrication, including chemical vapor deposition (CVD), physical vapor deposition (PVD), etch, electrochemical deposition (ECD), rapid thermal processing (RTP), ion implantation, chemical mechanical planarization (CMP), epitaxy (Epi), wet cleaning, atomic layer deposition (ALD), wafer metrology and inspection, and systems that etch or inspect circuit patterns on masks used in the photolithography process. Applied’s semiconductor manufacturing systems are used by integrated device manufacturers and foundries to build and package memory, logic and other types of chips.The majority of the Company's new equipment sales are for leading-edge technology for advanced 2X nanometer (nm) nodes and smaller dimensions. HOW A CHIP IS BUILT? To build a chip, the transistors, capacitors and other circuit components are first created on the surface of the wafer by performing a series of processes to deposit and selectively remove portions of successive film layers. Similar processes are then used to build the layers of wiring structures on the wafer. As the density of the circuit components increases to enable greater computing capability in the same or smaller physical area, the complexity of building the chip also increases, necessitating more process steps to form smaller transistor structures and more intricate wiring schemes. Advanced chip designs require more than 500 steps involving these and other processes to complete the manufacturing cycle. Today's advanced interconnects are made using copper as the main wiring material. Copper has low resistance and can carry a large amount of current in a small area, which allows signals to travel quickly. Applied is a leading supplier of systems for manufacturing copper-based interconnects, including equipment for depositing, etching and planarizing these multi-layer structures.To increase the speed of interconnect signals even further, low dielectric constant (low k) films are used to insulate the copper wiring. Applied provides systems for depositing low k dielectric films that enable higher device performance and longer battery life. The transistor is another key area of the chip where semiconductor manufacturers are improving their device designs to enhance performance. Applied has technically-advanced products for building smaller and faster transistors. One method of enhancing chip performance is strain engineering, a technique that stretches or compresses the space between atoms, allowing electrical current to flow more quickly. Multiple strain films are typically used in advanced devices since they have an additive effect on increasing transistor speed. Applied has systems to enable these applications using CVD and epitaxial deposition technologies. Major chipmakers are integrating high dielectric constant (high-k) and metal materials and processes in their transistor gate structures to increase chip performance and reduce power consumption. Applied has fully characterized processes for building these high-k/metal gates. These solutions include an integrated gate stack tool that combines multiple critical steps in a single system, including a portfolio of metallization technologies using CVD, ALD and PVD processes. 3D ICs : To address the need for higher performance in a smaller space driven by new consumer products, a new type of chip packaging at wafer level is emerging, which enables three-dimensional (3D) ICs. Providing greater functionality in a smaller footprint, 3D ICs stack multiple chips together and electrically connect them using deep holes, called through-silicon via (TSV) structures. Applied has production-proven systems and processes required for advanced packaging, including etch, CVD, PVD, ECD, wafer cleaning and CMP systems. Most of Applied’s semiconductor equipment products are single-wafer systems with multiple process chambers attached to a base platform. This enables each wafer to be processed separately in its own environment, allowing precise process control, while the system’s multiple chambers enable simultaneous, high productivity manufacturing. Applied sells most of its single-wafer, multi-chamber systems on eight basic platforms: the Endura®,, Centura®, Producer®, CentrisTM, Reflection®, Raider®, VIISta® and Vantage® platforms. These platforms support ALD, CVD, ECD, PVD, etch, ion implantation, and RTP technologies. Over time, the semiconductor industry has migrated to increasingly larger wafers to build chips. The predominant or common wafer size used today for volume production of advanced chips is 300 millimeter (mm), or 12-inch, wafers. Applied offers 300mm systems through its Silicon Systems Group segment. In addition, Applied offers earlier-generation 200mm systems, as well as products and services to support all of its systems, which are reported under its Applied Global Services segment. Deposition – In fabricating a chip Deposition is a fundamental step in fabricating a chip. During deposition, layers of dielectric (an insulator), barrier, or electrically conductive (typically metal) films are deposited or grown on a wafer. Applied Materials provides equipment to perform four types of deposition: ALD, CVD, ECD and PVD. In addition, Applied’s RTP systems can be used to perform certain types of dielectric deposition. Atomic Layer Deposition - ALD is an advanced technology in which atoms are deposited one layer at a time to build chip structures. This technology enables customers to fabricate thin films of either conducting or insulating material with uniform coverage in nanometer-sized structures. One of the most critical areas of the transistor is its gate, which is built by depositing layers of dielectric films. At the 22nm node and below, these film layers are so thin that they must be atomically engineered. The Applied Centura Integrated Gate Stack system features advanced ALD technology that builds ultrathin high-k film layers less than 2nm in thickness. Chemical Vapor Deposition - CVD is used to deposit dielectric and metal films on a wafer. During the CVD process, gases that contain atoms of the material to be deposited react on the wafer surface, forming a thin film of solid material. Films deposited by CVD may be silicon oxide, single-crystal epitaxial silicon, amorphous silicon, silicon nitride, dielectric anti-reflective coatings, low k dielectric (for highly-efficient insulating materials), aluminum, titanium, titanium nitride, polysilicon, tungsten, refractory metals or silicides. Applied offers the following CVD products and technologies: The Applied Producer CVD platform — The Producer high-throughput platform features Twin-Chamber® modules that have two single-wafer process chambers per unit. Up to three Twin-Chamber modules can be mounted on each Producer platform, giving it a simultaneous processing capacity of six wafers. Many dielectric CVD processes can be performed on this platform. The highest productivity model of this system is the Applied Producer GT, which features fast wafer handling performance and compact design. Low k Dielectric Films — Low k dielectric materials are used in copper-based chip designs to further improve interconnect speed. Using conventional CVD equipment, the Applied Producer Black Diamond® family of low k systems provides customers with a proven, cost-effective way to integrate a variety of low k films into advanced interconnect structures. The Company's latest third-generation low k technologies are featured on the Applied Producer Black Diamond 3 system and Applied Producer Nanocure 3 system. In addition, the Company offers its Applied Producer OnyxTM process, an innovative film treatment that optimizes the molecular structure of low k films. Together, these products are designed to enable smaller, higher performance and more power-efficient devices at 22nm and below. Lithography-Enabling Solutions — Applied offers several technologies on the Producer system to help chipmakers extend their current 193nm lithography tools, including a line of Applied APF® (advanced patterning film) films and Applied DARC® (dielectric anti-reflective coating) films. Together, they provide a film stack with the precise dimensional control and compatibility needed to cost-effectively pattern nano-scale features without additional integration complexity. Gap Fill Films — There are many steps during the chipmaking process in which extremely small and deep, or high aspect ratio (HAR), structures must be filled void-free with a dielectric film. Many of these applications include the deposition of silicon oxides in substrate isolation structures, contacts and interconnects. Applied's most advanced gap fill system is its Applied Producer Eterna™ FCVD™ system. Targeted for 20nm and below chips, the Eterna system delivers a liquid-like film that flows freely into virtually any structure to provide void-free dielectric fill. Strain Engineering Solutions — The Applied Producer HARP™ system plays a key role in enhancing transistor performance, enabling chipmakers to boost chip speed by depositing strain-inducing dielectric films. Offering the industry’s first integrated stress nitride deposition and ultraviolet (UV) cure solution, the Applied Producer Celera CVD delivers benchmark levels of high-stress tensile silicon nitride films. The Company also offers the Applied Centura SiNgenPlus low pressure CVD system for low temperature silicon nitride films. Used together, and in conjunction with silicon germanium (SiGe) films using Applied’s epitaxial deposition technologies, these systems can provide additive strain engineering benefits. Through-Silicon Via Films — Applied offers products for TSV fabrication, including the Applied Producer InVia™ system. This product uses an innovative process to deposit the critical oxide liner film layer in HAR TSV structures, enabling robust electrical isolation of the TSV, which is vital for reliable device performance. For applications where higher temperatures can damage the manufacturing process, the Applied Producer Avila™ CVD system and Applied Producer OptivaTM CVD system allow high-quality dielectric film deposition at stable substrate temperatures. 3D NAND and FinFET Films — 3D NAND requires deposition technology for vertical gate formation and complex patterning applications. Applied offers products for FinFET and 3D NAND fabrication, including the Applied Producer XP PrecisionTM CVD system released in 2014, which addresses the deposition challenges presented by vertical 3D architectures. Designed for high-volume manufacturing, the XP Precision system combines production-proven Producer CVD technology with more efficient, faster processing chamber technology. Copper Interconnect Encapsulation Solutions — In 2014, Applied introduced its Endura VoltaTM CVD Cobalt system for encapsulating copper interconnects in logic chips smaller than the 28nm node. The system deposits a conformal cobalt liner and selective cobalt capping layer to provide complete enclosure of copper lines, improving reliability while reducing yield-limiting issues. Epitaxial Deposition — Epitaxial silicon (epitaxy or epi) is a layer of pure silicon grown in a uniform crystalline structure on the wafer to form a high quality base for the device circuitry. Epi technology is used in an increasing number of IC devices in both the wafer substrate and transistor areas of a chip to enhance speed. The Applied Centura Epi system integrates pre- and post-epi processes on the same system to improve film quality and reduce production costs. This system is also used for SiGe epi technology, which reduces power usage and increases speed in certain types of advanced chips. For emerging transistor designs, the Applied Centura RP Epi system offers selective epi processes to enable faster transistor switching through strain engineering techniques. Polysilicon Deposition — Polysilicon is a type of silicon used to form portions of the transistor structure within the IC device. The Applied Centura Polygen™ LPCVD system is a single-wafer, multi-chamber product that deposits thin polysilicon films at high temperatures to create transistor gate structures. To address the challenging requirements of shrinking gate dimensions, the Applied Centura DPN Gate Stack system integrates chambers for decoupled plasma nitridation (DPN), RTP anneal, and polysilicon deposition on one platform to enable superior film quality and material properties. Tungsten Deposition — Tungsten is used in the contact area of a chip that connects the transistors to the wiring circuitry. In aluminum-based devices, tungsten is also used in the structures that connect the multiple layers of aluminum wiring. Applied has two products for depositing tungsten: the Applied Centura Sprint® Tungsten CVD system and the Applied Centura iSprint® ALD/CVD system which provide tungsten filling capability to 20nm and below. Electrochemical Deposition ECD is a process by which metal atoms from a chemical fluid (an electrolyte) are deposited on the surface of an immersed object. One application is to deposit copper in interconnect wiring structures. This process step follows the deposition of barrier and seed layers that prevent the copper from contaminating other areas of the device, improve the adhesion of the copper film and enable electrodeposition to occur. Another application is wafer level packaging for deposition of copper to fill TSV 3D chip-to-chip connections. Applied offers special configurations of the Applied Raider system for these ECD applications. Physical Vapor Deposition PVD is a physical process in which atoms of a gas, such as argon, are accelerated toward a metal target. The metal atoms chip off, or sputter away, and are then deposited on the wafer. The Applied Endura PVD system offers various advanced metal deposition processes, including aluminum, aluminum alloys, cobalt, titanium nitride, tantalum/tantalum nitride, tungsten/tungsten nitride, nickel, vanadium and copper. Introduced 24 years ago, the Company's Applied Endura platform is the most successful metal deposition system in the history of the semiconductor industry. The Applied Endura CuBS (copper barrier/seed) PVD system is widely used by customers for fabricating copper-based chips. The system deposits a tantalum-based barrier film that prevents copper material from entering other areas of the device and then a copper seed layer that primes the structure for the subsequent deposition of bulk copper. The Applied Endura CuBS RFX PVD system extends cost-effective CuBS technology to the 2Xnm node. The Applied Endura Avenir™ RF PVD system sequentially deposits the multiple metal film layers that form the heart of the industry’s new, faster, metal gate transistors. The Applied Endura iLB PVD/CVD system enables customers to shrink their speed-critical contact structures for 20nm and below devices. The Applied Endura AmberTM PVD system uses copper reflow technology to achieve rapid, void-free fill of interconnect structures at virtually any device node. In 2014, Applied introduced the Endura VenturaTM PVD system, incorporating the latest industry-leading PVD technologies. The Ventura system supports the use of titanium in volume manufacturing as an alternative barrier material and expands Applied's comprehensive toolset for wafer level packaging applications, including through silicon vias, redistribution layers, and bump technology used to connect the die to the substrates. Applied’s Endura system has also been used for many years in back-end applications to deposit metal layers before final bump or wire bonding packaging steps are performed. Additionally, the Applied Charger® UBM PVD system, which is specifically designed for under-bump metallization (UBM) and other back-end processes, features linear architecture for reliable performance and very high productivity at a low cost per wafer. Etch Etching is used many times throughout the IC manufacturing process to selectively remove material from the surface of a wafer. Before etching begins, the wafer is coated with a light-sensitive film, called photoresist. A photolithography process then projects the circuit pattern onto the wafer. Etching removes material only from areas dictated by the photoresist pattern. Applied offers systems for etching dielectric, metal, and silicon films to meet the requirements of advanced processing.For etching silicon, the Applied Centris AdvantEdge™ Mesa™ system features eight process chambers for high wafer output and proprietary system intelligence software to assure every process on every chamber precisely matches. The system also saves on power, water and gas consumption, helping customers to lower operating costs and support their sustainable manufacturing initiatives. Chip manufacturers are also beginning to employ 3D architectures in advanced memory chips to provide higher-density storage capacity. These structures require the precise etching of exceptionally deep and narrow structures. To meet this industry requirement, Applied offers its Applied Centura AvatarTM dielectric etch system that can etch holes and trenches up to 80:1 depth-to-width aspect ratios. Also for 3D chip manufacturing, the Applied Centura Silvia® system is specifically designed for etching small, deep holes for TSV applications. Rapid Thermal Processing RTP is a process in which a wafer is subjected to rapid bursts of intense heat that can take the wafer from room temperature to more than 1,000 degrees Celsius in less than 10 seconds. A rapid thermal process is used mainly for annealing, which modifies the properties of deposited films. The Applied Centura Radiance®Plus and Applied Vantage® RadOx™ RTP systems feature advanced RTP technology with differing platform designs. While the multi-chamber Centura platform offers exceptional process flexibility, the streamlined two-chamber Vantage platform is designed for dedicated high-volume manufacturing. These single-wafer RTP systems are also used for growing high quality oxide and oxynitride films, deposition steps that traditional large batch furnaces can no longer achieve with the necessary precision and control. Applied’s latest RTP systems address the critical need for controlling wafer temperature to increase chip performance and yield. The laser-based Applied Vantage Astra™ millisecond anneal system abruptly raises the surface temperature of the wafer locally to modify material properties at the atomic level. The Applied Vantage Vulcan system, the first RTP system to heat the wafer entirely from the backside, brings a new level of precision and control to the anneal process, allowing chipmakers to produce more high-performance devices per wafer. Ion Implantation Ion implantation is a key technology for forming transistors and is used many times during chip fabrication. During ion implantation, wafers are bombarded by a beam of electrically-charged ions, called dopants, which change the electrical properties of the exposed surface films. These dopants are accelerated to an energy that permits them to penetrate the substrate at a precise quantity and depth. Dopant concentration is determined by controlling the number of ions in the beam and the number of times the wafer passes through the beam, while the depth of the dopants is determined by the energy of the beam. Ion implantation systems may also be used in other areas of IC manufacturing to modify the material properties of the semiconductor devices, as well as in manufacturing crystalline-silicon solar cells. Applied offers a line of single-wafer ion implantation equipment that covers the entire energy and current range required to manufacture advanced devices. The VIISta 3000XP implanter delivers the angle precision required for advanced high-energy applications, while the VIISta 900XP implanter provides medium current precision doping. The VIISta PLAD implanter enables manufacturers to rapidly implant high dopant concentrations over the entire wafer using a low-energy process that preserves sensitive circuit features in next-generation devices. The VIISta Trident high current ion implanter provides the precise dose and angle control needed for advanced transistor structures. Chemical Mechanical Planarization The CMP process removes material from a wafer to create a flat (planarized) surface. This process allows subsequent photolithography patterning and material deposition steps to occur with greater accuracy, resulting in more highly uniform film layers with minimal thickness variations. Applied has led the industry with its 300mm Applied Reflexion® LK system, with features such as integrated cleaning, film measurement and process control capabilities. Applied's latest CMP product, the Applied Reflexion LK PrimeTM, is a critical enabler for FinFET gate and 3D NAND staircase structures. Metrology and Wafer Inspection Applied offers several products for locating, measuring and analyzing defects and features on the wafer during various stages of the fabrication process. These systems enable customers to characterize and control critical dimension (CD) and defect issues, especially at advanced generation technology nodes. Critical Dimension and Defect Review Scanning Electron Microscopes (CD-SEMs and DR-SEMs) — Scanning electron microscopes (SEMs) use an electron beam to form images of microscopic features of a patterned wafer at extremely high magnification. Applied’s SEM products provide customers with full automation, along with the high accuracy and sensitivity needed for measuring very small CDs. The Applied VeritySEM® 4i+ metrology system uses proprietary SEM imaging technology to enable precise control of the lithography and etching processes, measuring CDs at a precision of less than 0.3nm. Applied’s OPC Check™ software for the VeritySEM system performs automated qualification of OPC-based (optical proximity correction) chip designs, significantly reducing mask verification time over conventional manual methods. DR-SEMs review defects on the wafer (such as particles, scratches or residues) that are first located by a defect detection system and then classify the defects to identify their source. The high-throughput, fully automatic Applied SEMVision™ Defect Analysis products enable customers to use this technology as an integral part of their production lines to analyze critical defects with industry-leading throughput. The Applied SEMVision G6 system, designed to accelerate time-to-yield for leading-edge chip manufacturing at the 1Xnm node and beyond and enhanced by the Purity™ Automatic Defect Classification (ADC), is the most advanced of the SEMVision family of products. Wafer Inspection — Using deep ultraviolet (DUV) laser-based technology, defects can be detected on patterned wafers (wafers with printed circuit images) as they move between processing steps. Defects include particles, open circuit lines, and shorts between lines. The Applied UVision® 6 wafer inspection system detects yield-limiting defects in the critical patterning layers of logic and memory devices. Mask Making Masks are used by photolithography systems to transfer microscopic circuit designs onto wafers. Since an imperfection in a mask may be replicated on the wafer, the mask must be virtually defect-free. Applied provides systems for etching and inspecting masks. Applied's Tetra™ systems have been used by mask makers worldwide to etch the majority of high-end masks including 28nm/14nm nodes. The Applied Centura Tetra EUV (extreme ultraviolet) Advanced Reticle Etch system fabricates leading-edge masks at 22nm and smaller dimensions. The Applied Aera3™ Mask inspection uses sophisticated aerial imaging technology that allows users to immediately see how the pattern on the mask will appear on the wafer, revealing only the defects most likely to print and significantly reducing inspection time. These systems also address the challenge of fabricating emerging EUV lithography masks.

Overview of Trucking Business in USA

Trucking companies provide transportation services to virtually every industry operating in the United States and generally offer higher levels of reliability and faster transit times than other surface transportation options. The trucking industry is comprised principally of two types of motor carriers: LTL and truckload. LTL carriers typically pick up multiple shipments from multiple customers on a single truck and then route that freight for delivery through service centers where the freight may be transferred to other trucks with similar destinations. In contrast, truckload carriers generally dedicate an entire trailer to one customer from origin to destination.

According to the American Trucking Associations, total U.S. freight transportation revenue in 2012 was $795.7 billion, of which the trucking industry accounted for 80.7%. The LTL sector had revenue in 2012 of $51.5 billion, which represented 6.5% of total U.S. freight transportation revenue. In contrast to truckload carriers, LTL motor carriers require expansive networks of local pickup and delivery (“P&D”) service centers, as well as larger breakbulk, or hub, facilities. Significant capital is required to create and maintain a network of service centers and a fleet of tractors and trailers. The high fixed costs and capital spending requirements for LTL motor carriers make it difficult for new start-up or small operators to effectively compete with established carriers. In addition, successful LTL motor carriers generally employ, and regularly update, a high level of technology-based systems and processes that provide information to customers and help reduce our operating costs. The LTL industry is highly competitive on the basis of service and price and has consolidated significantly since the industry was deregulated in 1980. Based on 2012 revenue as reported in Transport Topics, the largest 25 LTL motor carriers accounted for approximately 60.6% of the total LTL market. Consolidation in the industry will continue due to customer demand for transportation providers offering both national and regional LTL as well as other complementary value-added services. Governmental Regulation : The industry is subject to regulation by many federal governmental agencies, including the Federal Motor Carrier Safety Administration (the “FMCSA”), the Pipeline and Hazardous Materials Safety Agency and the Surface Transportation Board, which are agencies within the DOT. It is also subject to rules and regulations of various state agencies. These regulatory authorities have broad powers, generally governing matters such as authority to engage in motor carrier operations, motor carrier registration, driver hours of service, safety and fitness of transportation equipment and drivers, certain mergers, consolidations and acquisitions and periodic financial reporting. In addition, they are subject to compliance with cargo-security and transportation regulations issued by the Transportation Security Administration ("TSA") within the U.S. Department of Homeland Security. In October 2009, the U.S. Court of Appeals for the District of Columbia Circuit ordered the FMCSA to review and re-issue rules governing hours of service for commercial truck drivers by July 26, 2011. This deadline was extended and on December 22, 2011, the FMCSA issued its final rule, which mandated compliance by July 1, 2013. The final rule reduced the maximum number of hours a truck driver can work each week to 70 hours from the former 82-hour limit. The rule maintains a maximum 11-hour daily driving limit, but requires drivers to take a 30-minute break prior to working beyond eight hours. The rule also includes changes to the “34-hour restart” provision. Implementation of the new rule has required certain changes in the operating procedures of trucking companies and has increased their operating costs by limiting the productivity of their drivers. As a result, the industry has hired additional drivers to supplement their labor requirements, which have increased our costs. These regulations require additional changes to their operations, increase their operating costs .

What should be Satya Nadella's #1 priority

I spent the entire evening going thru some of Microsoft’s latest presentations to its shareholders. I could see a theme focused on productivity and platform based on mobile first and Cloud first world. I would certainly agree that we are becoming more connected and the world is powered by Software more than ever before. At the same time I am a firm believer that just because you have the most powerful hammer, doesn’t mean that you bang every nail that you can see.

Following is the excerpt from Satya Nadella’s letter to Microsoft’s shareholders. “Increasingly, all of these experiences will become more connected to each other, more contextual and more personal. For example, today the Cortana app on my Windows Phone merges data from highway sensors and my own calendar and simply reminds me to leave work to make it to my daughter's recital on time. In the future, it will be even more intelligent as a personal assistant who takes notes, books meetings and understands if my question about the weather is to determine my clothes for the day or is intended to start a complex task like booking a family vacation. Microsoft experiences will be unique as they will reason over information from work and life and keep a user in control of their privacy.” I truly admire his passion about technology , but would disagree on his priorities. In the above excerpt he talks about the Cortana app for using it to for a simple task of reminding him about his daughter’s recital. I feel the only practical use of this kind of app would be the Duggar Family who have 19 kids and managing their schedules can be challenging. The average family has 1 or 2 kids. I have one daughter and I can very easily remember her schedule of activities, once in a while if there is a change in the schedule I get a message on my phone which is good for me. I am not sure why I would need Cortana for this??? I hope Satya Nadella remembers Aquantive. Microsoft bought it in 2007 for $6 billion cash. Following is what the company had to say about the acquisition in its 2007 10-k report “This acquisition will enable us to strengthen relationships with advertisers, agencies and publishers by enhancing our advertising platforms and services. The acquisition also provides us with increased depth in building and supporting next generation advertising solutions and environments such as cross media planning and video-on-demand.” Five years down the line in July-2012 the company took a Goodwill impairment charge of $6.2 billion. The impairment charge reflected the fact that the acquisition of Aquantive was a complete waste of money. Ironically Aquantive was the largest acquisition till 2007 only to be surpassed by Skype that Microsoft bought for $8.5 billion in 2011. I hope that this acquisition does not have a bad ending. The reason I am mentioning this is to showcase what happens when you try to solve a problem that does not exist. Coming back to my original point on prioritization. I would first give credit to Nadella for his vision on Cloud computing and how his efforts have helped Azure establish as a leader in the Cloud space. But offering a cloud service is like running a Car dealership where the customers are not just looking at a great car , but also a good maint plan so that they can drop off their cars every 5,000 miles and expect the dealership to perform all the necessary maint activities. On Nov-18-2014 Azure had a major outage and many of its users experienced a service interruption. The blog post describes the details of the issue. It also showcases the complexity of running the Cloud infrastructure. Microsoft Azure has won 80% of Fortune 500 customers. But one should remember that instances like those of Nov-18 provide a chance to Amazon and IBM’s sales reps to pitch their Cloud solutions and steal some business from Microsoft. Satya Nadella’s #1 priority should be to ensure that its existing Cloud customers get the best service as promised. On paper it looks simple , but software production support is one of the most challenging tasks. I have experienced it first hand for 17 years (being part of a large Enterprise IT shop). If Nadella can liveup to this promise then he certainly would be coined as a Winner, even if Contana does not liveup to the expectation, but not the other way around.

Business of Motion sensing Tech

If we rotate our smartphone from horizontal to vertical position , the picture also rotates with it. Ever wonder how this happens???....you will be surprised to know that it’s not Apple or Samsung’s Engineers that make it happen. This niche technology is controlled by niche tech companies like Invensense (INVN). Following post gives the overview of the technology behind this niche market and how Invenses’s core competence is helping it thrive in this space.

First let us look at this great video that explains a simple question - How a Smartphone Knows Up from Down THE BUSINESS CYCLE : The largest customer segment for this technology are the Smartphone manufacturers. For every new Smartphone model , the Smartphone company invites all its vendors to present their designs for the respective areas. For instance when Samsung was designing its Galaxy S5 line of product it might have invited Invensense and ST Microelectronics to present their designs for Accelerometer / Gyroscope component. Invensese won the design and got the order to supply the sensors for that model. Thus depending on the success of Samsung Galaxy’s S5 product line Invenses’s sales of sensors will be affected. Economics of this business : The companies need to invest substantial resources towards R&D to develop their own technology before they can market it . To make things worse , they need to be extremely agile in the cost front because their customers expect the costs to come down over a certain period of time. Any upturn in the semiconductor or consumer electronics industries could result in increased competition for access to the third-party foundry and assembly capacity on which these companies are dependent to manufacture and assemble their products. None of the third-party foundry or assembly contractors can provide assurances on the capacity, hence the companies like Invenses have to live with this risk. The competition is in the last mile. In this case its to do with the apps that increase the value of the sensor’s functionality for any smartphone producer. Over the last decade, advances in technology have led to a rapid growth and proliferation of consumer electronics devices used for communication, entertainment, convenience and business that include sensor technology. In order to differentiate products and increase sales in intensely competitive markets, consumer electronics device manufacturers have been eager to adopt new sensor device based features and functionalities, expand use cases and create new, compelling user interfaces and interactive experiences using technologies, such as touch screen and, more recently, voice-controlled and motion-based functions. Most mass market smartphone manufacturers have successfully introduced consumers to motion-based features which enables gaming, navigation and health and fitness applications. More advanced motion sensing and voice and motion processing capabilities facilitate motion-based video gaming, voice and motion based device control, navigation, health and fitness and advanced display functionality have become a part of the standard feature set of smartphone, tablet and wearable devices. These capabilities are also being incorporated into a range of other consumer electronics devices. The momentum behind the adoption of motion interfaces in consumer electronics and other applications illustrates how technology can change the way consumers interact with their electronics devices, as well as set consumer expectations for future consumer products. Key MEMS Based Motion and Audio Sensors Sensors that are able to detect motion in three-dimensional space have been commercially available for several decades and have been used in automobiles, aircraft and ships. Use of MEMS based audio sensors has grown significantly in the consumer electronics markets. While the size, power consumption, cost, manufacturing methods, calibration requirements, audio performance and other design complexities involved with MEMS motion and MEMS audio sensors has historically limited their mass adoption in consumer electronics. The following five principal types of motion and also audio sensors are important for motion interface in free space and a positive consumer audio experience: Accelerometers (G-sensors) measure linear acceleration and tilt angle. Single and multi-axis accelerometers detect the combined magnitude and direction of linear, rotational and gravitational acceleration. They can be used to provide limited motion sensing functionality. For example, a device with an accelerometer can detect rotation from vertical to horizontal state in a fixed location. As a result, accelerometers are primarily used for simple motion sensing applications in consumer devices, such as changing the screen of a mobile device from portrait to landscape orientation. Gyroscopes (Gyros) measure the angular rate of rotational movement about one or more axes. Gyroscopes can measure complex motion accurately in free space, tracking the position and rotation of a moving object. In contrast, accelerometers primarily detect the fact that an object has moved or is moving in a particular direction. Unlike accelerometers and compasses, gyroscopes are not affected by errors related to external environmental factors, such as gravitational and magnetic fields. Hence, gyroscopes greatly enhance the responsiveness of the motion sensing capabilities in devices and are used for advanced motion sensing applications in consumer devices, such as full gesture recognition, movement detection and motion simulation. Magnetic Sensors (Compasses) detect magnetic fields and measure their absolute position relative to Earth’s magnetic north and nearby magnetic materials. Information from magnetic sensors can also be used to correct errors from other motion sensors, such as gyroscopes. One example of how compass sensors are used in consumer devices is reorienting a displayed map to match up with the general direction a user is facing. Many smartphones and tablet devices have begun incorporating compasses to enable enhanced gaming and location-based applications. Pressure Sensors (Barometers) measure relative and absolute altitude through the analysis of changing atmospheric pressure. Pressure sensors can be used in consumer devices for sports and fitness or location-based applications where information can be used for elevations or floor-specific location. Audio Sensors (Microphones) detect audible sound, as well as ultrasound in some use cases. The audio signal received by a microphone is delivered to circuits that convert it to a digital signal to be processed, transmitted, played back or stored. Microphones are used in devices like mobile phones, digital still and video cameras, laptops, headsets, smart watches, remote controls and even industrial applications. Multiple microphones are often used in mobile phones to ensure high quality pick up of the desired audio signal. INVENSENSE’ S CORE COMPETENCE : The foundation of their MotionTracking devices is their patented fabrication platform, which enables integration of standard MEMS with CMOS (also known as CMOS-MEMS) in a small, cost-effective wafer-level solution. Combining a MEMS wafer with an industry standard CMOS wafer reduces the number of MEMS manufacturing steps, and enables wafer-level testing, and the use ofThe foundation of their MotionTracking devices is their patented fabrication platform, which enables integration of standard MEMS with CMOS (also known as CMOS-MEMS) in a small, cost-effective wafer-level solution. Combining a MEMS wafer with an industry standard CMOS wafer reduces the number of MEMS manufacturing steps, and enables wafer-level testing, and the use of wafer-level packaging, thereby reducing back-end costs of packaging and testing and improving overall product yield and performance. In addition to their CMOS-MEMS process, they have developed low-cost, high-throughput proprietary test and calibration systems, which further reduces back-end costs. They have pioneered a technological breakthrough in high-volume manufacturing of low-cost, high-performance MEMS motion processors. Combining this unique high-volume fabrication capability with their other core proprietary technologies, they are able to deliver our MotionTracking devices with industry-leading integration and cost-effectiveness. Fabrication platform enables the integration of multiple motion sensors, such as gyroscopes and accelerometers, on a single chip with processing capability. Their latest generation of MotionTracking devices have both an embedded three-axis gyroscope and three-axis accelerometer on the same chip, enabling integrated six-axis motion interface functionality. As a result of integrating multiple sensors, their products can eliminate the traditional calibration steps required with discrete solutions as well as offload the intensive motion interface computation requirements from the host processor. Over time, they believe they can integrate more advanced features and functionalities into their solution. Most MEMS devices are manufactured in proprietary in-house fabrication facilities utilizing numerous fabrication steps, esoteric substrates and MEMS-specific manufacturing processes that are not compatible for integration with standard CMOS fabrication processes. Their patented fabrication process allows them to utilize a fabless business model without relying on specialty foundries for MEMS manufacturing. Their fabless model enables cost-effective, high-volume production and provides them with the flexibility to quickly react to their customers’ needs. Additionally, their ability to perform wafer-level testing combined with our close collaborative relationships with third-party foundries enables them to better control the manufacturing process and product yields, resulting in lower cost and improved device performance and reliability. Their Audio technology includes three core components: MEMS elements designed specifically for high-quality audio sensing; ASICs—the circuits that take the raw sensor output and process it for transmission; and packaging technology, which is a very important part of the acoustic design of the microphone. InvenSense is one of the few microphone suppliers that develops all three components of the entire microphone, giving them better control of the overall acoustic system. This advantage allows them to better support their customers’ needs and deliver differentiated products to market. I have also found that Invensense is not just a hardware company. It has actively collaborated with Google in helping it develop Android’s capabilities towards developing applications related to motion sensors. Their MotionApps platform enables device manufacturers with limited motion interface experience to rapidly incorporate higher level motion-enabled applications in their products. Following is a 45 minute video where David Sachs from Invensese gives a talk "Sensor Fusion on Android Devices" NOTE : The video was developed in Aug-2010, so the content might seem old, but the basic concepts discussed are still relevant and it showcases Invensense's ability to collaborate with Google. Click here to view the video.

What is a Watt ?

Any time we analyze an Energy business, we come across the terms Mega Watt and Giga Watt . So what is actually a “Watt” . Following Post gives technical details of this term.

Watt is the unit of power . It primarily measures the rate of Energy consumed. Thus 1 Watt = 1 joule / second. One Watt is also defined as the current flow of one ampere with voltage 1v. Ampere : Ampere is the unit of electric current , named after Andre-Marie Ampere of France. One ampere is defined as the current that flows with electric charge of 1 coulomb per second. Coulomb : It is the fundamental unit of electrical charge , basically it is the physical property of matter that causes it to experience a force when placed in an electromagnetic field. There are two types of charges , positive or negative charge. Similar charges repel and opposites react. So what creates a positive charge? If an object has an excess of electrons then its negatively charged and is otherwise positively charged or neutral. 1 coulomb = 6.24 x 10 18 electrons charge. Farad : It measures capacitance of a capacitor which when charged with 1 coulomb of electricity produces a potential difference of 1 volt. Henry : Is the Unit of Inductance , named after Joseph Henry who discovered Electromagnetic induction independently at about the same time as Michael Faraday. Definition : If the rate of charge of current in a circuit is 1 ampere per second and the resulting Electromotive force (EMF) is 1 volt then the inductance of the circuit is 1 Henry.. Ohm : Ohm named after Greg Simon Ohm , its defined as a resistance between two points of a conductor when a constant potential difference of 1 volt applied to these points produces in the conductor a current of 1 ampere , the conductor not being seat of any Electromagnetic force. F = (A x S) / V = J / V2 = (W x S) / V2 = C / V = C2 / J = C2 / (N x M)   =(S2 x C2) / (M2 x kg) = (S4 x A2) / (M2 x kg) = S / Ohm = S2 / H F = Farad , A : Ampere , V = Volt , C = Coulomb , J = Joule , M = Meter , N = Newton , H= Henry , S = Second , W = watt , kg = Kilogram

Value of DISH'S Spectrum

FCC’s latest Spectrum auction termed Auction-97 started on Nov-13.Till today (Nov-26-2014) the bidding has crossed $37 billion. This is more than double the expected value and shows the pent-up demand for this scarce resource for Telecom companies. Dish Network seemed to be the biggest gainer , because the latest auction signaled higher value for its Spectrum. Its stock price since Nov-13 has jumped from $64 / share to $78 / share. With 460 million shares outstanding its market value jumped from $29.4 billions to $35.88 billions , increase in $6.4 billion in less than 2 weeks. Following article analyzes the economics of owning Spectrum license and its impact on Dish’s valuation.

Following are the main points impacting Spectrum’s value. 1. What is Spectrum? : Spectrum refers to a specific range of Radio frequency for a specific place. Its owned by FCC which further licenses it to the highest bidder through Auctions for commercial use. 2. FCC started auctioning Spectrum in 1994 and till date had 96 Auctions. Auction-97 is currently in progress. 3. Business use of Spectrum : As mentioned above , Spectrum refers to a range of radio frequency. Thus each range is suitable for a certain use. Wireless communications for cell phones use a set of ranges, but these differ based on the type of Wireless network. Thus practically not all Spectrum have same in value. In other words if one owned a license for a certain range of Spectrum which had a very limited commercial use then its value would be very less , value is also dependent on the area which the specific license covers, for instance a license for a place in the middle of Idaho might be far less valuable than that of New York city. Its because the value of the license is directly proportional to the population it covers. 4. Dishnet’s Spectrum : I queried FCC’s Spectrum database to get details of Dishnet’s Spectrum. As per the data , Dish owns 3,086 licenses. All are 700 Mhz channel block ‘E’. Altogether these licenses cover 240 million people. This I calculated by adding populations of all areas covered by 3,086 licenses. 5. Commercial use of 700 Mhz Spectrum : Now the most important factor determining value of Dish’s Spectrum is the commercial application of 700 Mhz Spectrum. 700 Mhz was once used by Analog TV broadcasting. In the year 2009 , analog TV broadcasting was stopped and all broadcasting was converted to digital. This freed up the 700 Mhz frequency that the FCC auctioned. 700 Mhz C Block Spectrum is already used by Verizon in its 4G LTE network. Verizon also sold to At&T 700 Mhz B Band for $1.9 billion , the licenses covered 42 million people (reference 2013 AT&T 10-K report). 6. As per the Wall Street Journal article on Nov-24-2014 (Heard on Street section) New Street research values Dish’s Spectrum at $41 billion. This is based on the high bids received on the latest FCC Auction (Auction 97). CONCLUSION : Considering the fact that Dish’s 700 Mhz Spectrum covers 240 million people (75% of USA population) and the recent pent-up demand for Spectrum through the FCC auction, thus $41billion value of Dish’s Spectrum seems reasonable.